1. Field of the Invention
The present invention relates to a circuit board structure having an embedded capacitor and a method for fabricating the same, and more particularly, to a circuit board structure integrated with a capacitor and a circuit structure and a method for fabricating the same.
2. Description of the Prior Art
As electronic products are becoming smaller, it is the trend that electronic components are embedded in package substrates to accommodate such a trend. For example, passive elements such as resistors, capacitors and inductors are often embedded in a substrate. A wiring structure is then provided on the substrate to form a circuit board structure with embedded passive components for electrically connecting to active elements such as semiconductor chips.
FIGS. 1A to 1C are cross-sectional views illustrating the conventional method for fabricating a circuit board structure with an embedded capacitor.
Referring to FIG. 1A, a circuit layer 10 and a first electrode plate 11a are disposed on each of the two opposing surfaces of the core layer board 1. At least one plated through hole (PTH) 12 penetrating the core layer board 1 is formed for electrically connecting the circuit layers 10.
Referring to FIG. 1B, a high dielectric material layer 13 is formed on the surface of the core layer board 1, the circuit layers 10 and the first electrode plates 11a. 
Referring to FIG. 1C, a second electrode plate 116 is formed on the high dielectric material layer 13 at a position corresponding to each of first electrode plates 11a, so that capacitors 11 are formed by the first electrode plate 11a and the second electrode plate 11b and the high dielectric material layer 13.
The high dielectric material layer 13 in the traditional circuit board structure is made of a material with high dielectric constant. During fabrication of the circuit board structure, the high dielectric material layer 13 is formed on the core layer board 1, the circuit layers 10 and the first electrode plates 11a by lamination. Since the high dielectric material layer 13 contains a higher percentage of ceramic material, it has poor fluidity during the lamination process. As a result, the high dielectric material layer 13 cannot be easily bonded to the surface of the core layer board 1, so delamination may occur between the high dielectric material layer 13 and the core layer board 1.
Furthermore, since the circuit layers 10 and the first electrode plates 11a are protruding from the surface of the core layer board 1, there are step-like height differences between the circuit layer 10 and the core layer board 1 or between the first electrode plates 11a and the core layer board 1, which causes bubbles to form in these step-like height differences during lamination of the high dielectric material layer 13 on the surfaces of the core layer board 1, the circuit layers 10 and the first electrode plates 11a. In consequence, delamination may also occur during subsequent thermal processes, reducing the reliability of the circuit board structure.
Since the circuit layers 10 and the first electrode plates 11a are protruding from the surface of the core layer board 1, the thickness of the high dielectric material layer 13 formed on the core layer board 1, the circuit layers 10 and the first electrode plates 11a is unlikely to be uniform, which results in great variations in the capacitance of the capacitors 11 and therefore reduction in precision thereof.
In order to solve the abovementioned problems, an alternative method for fabricating a circuit board structure with an embedded capacitor is proposed as shown in FIGS. 2A and 2B.
Referring to FIG. 2A, a circuit layer 20 and a first electrode plate 21a are disposed on each of the two opposing surfaces of the core layer board 2. At least one plated through hole (PTH) 22 penetrating the core layer board 2 is formed for electrically connecting the circuit layers 20. A filler layer 23 (e.g. resin material) is formed on the surface of the core layer board 2, wherein the filler layer 23 is flush with the circuit layers 20 and the first electrode plates 21a. 
Referring to FIG. 2B, a high dielectric material layer 24 is formed on the surface of the filler layer 23, the circuit layers 20 and the first electrode plates 21a. Second electrode plates 21b are formed on the surface of the high dielectric material layer 24 at positions corresponding to the first electrode plates 21a respectively such that capacitors 21 are formed by the first electrode plate 21a, the second electrode plate 21b, and the high dielectric material layer 23.
In the aforesaid structure, the filler layer 23 is formed on the core layer board 2, so as to render the core layer board 2 uniform, preventing lamination between the high dielectric material layer 24 and the core layer board 2 or formation of bubbles in the high dielectric material layer 24. However, an extra layer (i.e. the filler layer 23) is required in the conventional fabrication process to obtain a uniform surface of the core layer board 2, so the cost of fabrication is increased. In addition, it is difficult to obtain a uniform surface of the core layer board 2 by forming the filler layer 23 on the surface of the core layer board 2. As a result, it is not suitable for fabrication of thin substrates.
Therefore, there is a need for a circuit board structure with an embedded capacitor and a method for fabricating the same that eliminates the shortcomings in the prior art.